Intelligible Test Techniques To Support Error Tolerance

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Intelligible test techniques to support error-tolerance ...

    https://www.researchgate.net/publication/4115149_Intelligible_test_techniques_to_support_error-tolerance
    We introduce the concept of error-tolerance, and mention related issues needed to support this concept, including ways for specifying performance, design techniques that consider yield, test ...

Intelligible test techniques to support error-tolerance ...

    https://www.semanticscholar.org/paper/Intelligible-test-techniques-to-support-Breuer/fae0c0058c0d63cc9d9534ed8f9f92d63bd6fb07
    Error-tolerance is based on the fact that many digital systems exhibit acceptable behavior even though they contain defects and occasionally output errors. A radically new test methodology, called intelligible testing, is required to support error-tolerance. This paper addresses parts of this methodology.

An Error Rate Based Test Methodology to Support Error ...

    https://www.researchgate.net/publication/3153265_An_Error_Rate_Based_Test_Methodology_to_Support_Error-Tolerance
    Testing to support error-tolerance involves new ATPG tools, new fault simulators, and new DFT and BIST techniques. View Show abstract An ATPG for threshold testing; Obtaining acceptable yield in ...

Reduction of detected acceptable faults for yield ...

    https://dl.acm.org/doi/10.5555/1266366.1266717
    Reduction of detected acceptable faults for yield improvement via error-tolerance. Share on. Authors: Tong-Yu Hsieh. National Cheng Kung University, Tainan, Taiwan. National Cheng Kung University, Tainan, Taiwan. View Profile, Kuen-Jong Lee.

Let's think analog Request PDF

    https://www.researchgate.net/publication/4143654_Let's_think_analog
    We introduce the concept of error-tolerance, and mention related issues needed to support this concept, including ways for specifying performance, design techniques that consider yield, test ...

Approximate Computing: An Emerging Paradigm For Energy ...

    http://users.ece.utexas.edu/~michael/ETS2013.pdf
    [42] M.A. Breuer, “Intelligible test techniques to support error-tolerance,” in Proc. IEEE Asian Test Symposium, pp. 386-393, 2004. [43] I. Chong, H. Cheong, and Antonio Ortega, “New quality metric for multimedia compression using faulty hardware,” in Int’l Workshop on Video Processing and Quality Metrics for Consumer Electronics, 2006.

An Error Rate Based Test Methodology to Support Error ...

    http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4459841&arnumber=4453874&count=31&index=24
    Abstract: Error-tolerance is an innovative technique to address the problem of low yields in nanometer very large scale integrated (VLSI) circuitry, which is the backbone of the system-on-a-chip (SOC) revolution. The basic principle of error-tolerance is that some chips may occasionally produce erroneous outputs, but still provide acceptable ...

An error-oriented test methodology to improve yield with ...

    https://ieeexplore.ieee.org/document/1617575/
    Abstract: The main objective of error-tolerance is to increase the effective yield of a process by identifying defective but acceptable chips. In this paper, we propose an error-oriented test methodology to support error-tolerance in scan-based digital circuits.

A Simulated Annealing Inspired Test Optimization Method ...

    https://link.springer.com/article/10.1007/s10836-013-5357-0
    Mar 08, 2013 · Hsieh T-Y, Lee K-J, Breuer MA (2006) An error-oriented test methodology to improve yield with error-tolerance. Proc. 24th VLSI test symposium, 30 …Cited by: 2

(PDF) Design Accuracy-Configurable Full Adders for Digital ...

    https://www.researchgate.net/publication/315458654_Design_Accuracy-Configurable_Full_Adders_for_Digital_Signal_Processing_Applications
    Design Accuracy-Configurable Full Adders for Digital Signal Processing Applications ... Intelligible test techniques to support error-tolerance. ... Testing to support error-tolerance involves new ...



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